Bohrium for OpenCL with FPGA

Although FPGA based computing has been very attractive for its performance pr. watt in recent years, it has been notoriously difficult to program for typical high performance computing problems. Two things have changed within the last two years that may turn this problem upside down. First, the OpenCL programming model has been adopted for use on FPGA boards. And Intel/Altera has produced a board with hardware floating point units. This project seeks to explore the performance potential for using the Bohrium OpenCL backend targeting an Arria 10 FPGA. This setup will allow researchers to write code in high-level Python/NumPy and have it executed on power efficient FPGAs without knowledge of how an FPGA works, similar to how they are utilizing GPGPUs.

Area: Project Bachelor Masters

Tags: Hardware FPGA OpenCL Bohrium HPC SME Bh107

Contact: Kenneth Skovhede <>, Brian Vinter <>, Mads R. B. Kristensen <>

Activities: Hardware-design FPGA OpenCL Bohrium